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Tips For High Frequency PCB (RF PCB) Design

time2018/06/21

In order to achieve more reasonable design and better anti-interference ability for high frequency PCB (RF PCB), these tips should be considered.

1.How to Choose PCB Material

The PCB material must strike a balance between meeting design requirements and mass productivity and cost. It is very important when design the high speed PCB Boards. For example, the common Fr4 material, the dielectric loss at several GHz frequencies has a great influence on the signal attenuation and may not be suitable. In electrical terms, it should be noted whether the dielectric constant and the dielectric loss are combined at the designed frequency.


2.How to avoid high frequency interference?

The basic idea of avoiding high-frequency interference is to minimize the electromagnetic field interference of high-frequency signals, which is called crosstalk. You can use the distance between the high-speed signal and the analog signal, or add ground guard/shunt traces next to the analog signal. Also pay attention to digital noise interference on the analog ground.


3.How to solve the problem of signal integrity in high frequency PCB board design?

Signal integrity is basically a problem of impedance matching. The factors affecting the impedance matching include the signal source's architecture and output impedance, the characteristic impedance of the trace, the characteristics of the load, and the topology of the trace. The solution is to terminate and adjust the routing topology.


4.How is the differential wiring method implemented for RF PCB?

There are two points to note. First, the length of the two lines should be the same. The other is that the spacing between the two lines (which is determined by the differential impedance) must remain constant, that is, it must be parallel. There are two types of parallelism. One is a two-line walk on the side-by-side, and one is a two-line walk on an over-under. Generally, side-by-side methods are generally used.


5.How to achieve differential wiring for only one output of the clock signal line?

It is meaningful to use differential wiring for both the signal source and the receiver. Therefore, it is not possible to use differential wiring for clock signals with only one output.


6.Can a matching resistor be added between the receiver differential line pairs?

The matching resistance between the differential pairs at the receiving end is usually added, and its value should be equal to the value of the differential impedance. Like this, the signal quality will be better.


7.Why are the differential pair wiring close and parallel?

The wiring of differential pairs should be close and parallel as appropriate. The so-called proper proximity is because this spacing affects the value of the differential impedance, which is an important parameter for designing a differential pair. The need to be parallel is also due to maintaining the consistency of the differential impedance. If the two lines are suddenly missed, the differential impedance will be inconsistent, which will affect the signal integrity and timing delay.


8. How to deal with some theoretical conflicts in actual wiring?

Basically, it is right to divide analog/digital grounds. It should be noted that the signal traces should not cross over the moat, and do not make the return current path of the power supply and the signal too large.

The crystal oscillator is an analog positive feedback oscillator circuit. To have a stable oscillation signal, the loop gain and phase specifications must be satisfied. The oscillation specification of the analog signal is easily disturbed. Even adding ground guard traces may not completely isolate the interference. And too far away, noise on the ground plane will also affect the positive feedback oscillation circuit. Therefore, the distance between the crystal and the chip must be close.

There is a lot of conflict between high-speed cabling and EMI requirements. However, the basic principle is that due to EMI resistance capacitors or ferrite bead, some of the electrical characteristics of the signal cannot be caused to fail. Therefore, it is better to solve or reduce EMI problems by arranging traces and PCB stacking techniques, such as high-speed signals going to the inner layer. In the end, resistors and capacitors or ferrite bead are used to reduce the damage to the signal.


9. How to solve the contradiction between manual wiring and automatic wiring?

Nowadays, most of the auto routers of the strong cabling software have set constraints to control the winding method and the number of vias. The winding engine capabilities and constraints set by each company are sometimes very different. For example, whether there are enough constraints to control the meandering line, whether it can control the spacing of differential pairs, etc. This will affect whether or not the automatic routing method can meet the designer's idea. In addition, the difficulty of manually adjusting the wiring is also absolutely related to the capabilities of the winding engine. For example, the pushing ability of the route, the pushing ability of the via hole, and even the pushing ability of the route to push the copper and so on. Therefore, choosing a router with powerful routing engine capability is the solution.


10. About test coupon.

The test coupon is used to measure the characteristic impedance of a manufactured PCB with TDR (Time Domain Reflectometer) to meet the design requirements. The impedance to be controlled generally has two conditions: single line and differential pair. Therefore, the line width and line spacing (if there is a differential pair) on the test coupon are the same as the lines to be controlled. The most important thing is the location of the grounding point when measuring. In order to reduce the inductance of the ground lead, the TDR probe ground is usually very close to the probe tip. Therefore, the distance between the point on the test coupon and the ground point is measured. To comply with the probe used.


11.In high frequency PCB Board design, how should the copper layers of the signal layer be distributed on the ground and the power supply?

In general, copper in the blank area is grounded. It is only necessary to pay attention to the distance between the copper and the signal line when applying copper next to the high-speed signal line, because the deposited copper will reduce the characteristic impedance of the trace. Also be careful not to affect the characteristic impedance of its layer, for example in the structure of a dual strip line.


12. Does adding test points affect the quality of high-speed signals?

Whether it will affect the signal quality depends on how quickly the test point is added and how fast the signal is. Basically added test points (without via or DIP pins as test points) may be added to the line or pulled from the line. The former is equivalent to adding a small capacitor on the line, while the latter is more than one branch. Both of these conditions will have some effect on the high-speed signal more or less. The degree of the influence is related to the frequency speed of the signal and the edge rate of the signal. The size of the effect can be known through simulation. In principle, the smaller the test point, the better (of course, to meet the test equipment requirements) The shorter the branch, the better.


13.How to consider the impedance matching problem in the design of high frequency PCB design schematics?

Impedance matching is one of the design elements when designing high-speed PCB circuits. The impedance value has an absolute relationship with the trace method, such as the distance between the microstrip or double stripline, the reference layer (power layer or ground layer), trace width, PCB material, etc. Both will affect the characteristic impedance of the trace. In other words, the impedance value can be determined after wiring. General simulation software can not consider some impedance discontinuity wiring conditions due to the circuit model or the mathematical algorithm used, and only some terminators (such as series resistance) can be reserved on the schematic diagram at this time. To mitigate the effects of discontinuity in the trace impedance. The only way to truly solve the problem is to pay attention to avoiding impedance discontinuities when wiring.


14.In the design of high-speed PCB, what aspects should the designer consider EMC and EMI?

In general EMI/EMC design, it is necessary to consider both radiated and conducted. The former belongs to the higher frequency part (>30MHz) and the latter is the lower frequency part (<30MHz). Only pay attention to the high frequency and ignore the low frequency part. A good EMI/EMC design must begin with a layout that takes into account the location of the device, the layout of the PCB stack, the important on-line behavior, the choice of devices, etc. If these are not prior arrangements, post-resolve They will do less work and increase costs.

For example, the position of the clock generator should not be as close as possible to the external connector. The high-speed signal should go as far as possible to the inner layer and pay attention to the matching of the characteristic impedance and the reference layer to reduce the reflection. The slew rate of the signal pushed by the device should be as small as possible to reduce the high signal. Frequency components, choose the decoupling/bypass capacitance when paying attention to whether its frequency response meets the demand to reduce the power layer noise. Also, note that the return path of the high-frequency signal current minimizes the loop area (ie, the loop impedance is as small as possible) to reduce radiation. It is also possible to split the ground plane to control the range of high-frequency noise. Finally, the chassis ground of the PCB and the housing is properly selected.


15.Above 2G high frequency PCB design, alignment, layout, what should be the focus of attention?

Above 2G high frequency PCB belongs to RF circuit design and is not in the discussion of high speed digital circuit design. The layout and routing of RF circuits should be considered together with the schematic, because placement and routing can cause distribution effects. Moreover, some passive components of the RF circuit design are defined through parameterization and special shape copper foils are implemented. Therefore, EDA tools are required to provide parameterized devices and can edit special shape copper foils.